The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Jan. 24, 2013
Applicant:

Shin-etsu Chemical Co., Ltd., Toyko, JP;

Inventors:

Toshio Shiobara, Annaka, JP;

Hideki Akiba, Annaka, JP;

Susumu Sekiguchi, Takasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/28 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/29 (2006.01); B32B 7/02 (2006.01); H01L 23/31 (2006.01); H01L 21/78 (2006.01); B32B 27/00 (2006.01); B32B 5/00 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
B32B 7/02 (2013.01); H01L 23/31 (2013.01); H01L 21/78 (2013.01); B32B 27/00 (2013.01); B32B 5/00 (2013.01); H01L 23/293 (2013.01); H01L 21/561 (2013.01); H01L 24/97 (2013.01); H01L 24/32 (2013.01); H01L 2224/29099 (2013.01); H01L 2224/32225 (2013.01); H01L 2924/10253 (2013.01);
Abstract

Described herein is a sealant laminated composite for collectively sealing a semiconductor device's mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor device's forming surface of a wafer on which semiconductor devices are formed. The composite can include a support wafer and an uncured resin layer constituted of an uncured thermosetting resin formed on one side of the support wafer. In certain aspects, the sealant laminated composite is very versatile, even when a large diameter or thin substrate or wafer is sealed. In certain aspects, this can prevent the substrate or wafer from warping and the semiconductor devices from peeling; can collectively seal a semiconductor device's mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor device's forming surface of a wafer on which semiconductor devices are formed on a wafer level; and can provide a sealant laminated composite that is excellent in the heat resistance and humidity resistance after sealing.


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