The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Aug. 15, 2013
Applicant:

Renesas Electronics Corporation, Kawasaki, JP;

Inventors:

Yoshiharu Kaneda, Kawasaki, JP;

Naoko Taniguchi, Kawasaki, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-Shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/495 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49503 (2013.01); H01L 2224/92247 (2013.01); H01L 24/97 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/32245 (2013.01); H01L 23/49575 (2013.01); H01L 23/49541 (2013.01); H01L 21/565 (2013.01);
Abstract

To enhance the reliability of a semiconductor device. The semiconductor device includes die pads, over which a first semiconductor chip and a second semiconductor chip are mounted respectively, a plurality of support pins that support each of the die pads, a plurality of inner leads and outer leads arranged around the die pads, a plurality of wires that electrically couple the semiconductor chips to the inner leads, and a sealing body that seals the semiconductor chips, the inner leads, and the wires. Each of the die pads is supported by three support pins integrally formed together with the die pad, and each of second support pins of each pair of the three support pins is arranged between the inner leads adjacent to each other.


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