The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2014

Filed:

Jun. 27, 2011
Applicant:

Aditya Ramamoorthy, Santa Clara, CA (US);

Inventor:

Aditya Ramamoorthy, Santa Clara, CA (US);

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/27 (2006.01); G06F 11/10 (2006.01); H03M 13/25 (2006.01); H03M 13/11 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
H03M 13/255 (2013.01); G11C 11/5621 (2013.01); G06F 11/1072 (2013.01); H03M 13/11 (2013.01);
Abstract

Embodiments of the present invention provide multi-level signal memory with LDPC and interleaving. Thus, various embodiments of the present invention provide a memory apparatus that includes a memory block comprising a plurality of memory cells, each memory cell adapted to operate with multi-level signals. Such a memory apparatus also includes a low density parity check (LDPC) coder to LDPC code data values to be written into the memory cells and an interleaver adapted to apply bit interleaved code modulation (BICM) to the LDPC coded data values to generate BICM coded data values. Other embodiments may be described and claimed.


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