The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2014
Filed:
Aug. 02, 2011
Ralph E. Bellofatto, Ridgefield, CT (US);
Steven M. Douskey, Rochester, MN (US);
Rudolf A. Haring, Cortlandt Manor, NY (US);
Moyra K. Mcmanus, Peekskill, NY (US);
Martin Ohmacht, Yorktown Heights, NY (US);
Dietmar Schmunkamp, Schoenaich, DE;
Krishnan Sugavanam, Elmsford, NY (US);
Bryan J. Weatherford, Essex Junction, VT (US);
Ralph E. Bellofatto, Ridgefield, CT (US);
Steven M. Douskey, Rochester, MN (US);
Rudolf A. Haring, Cortlandt Manor, NY (US);
Moyra K. McManus, Peekskill, NY (US);
Martin Ohmacht, Yorktown Heights, NY (US);
Dietmar Schmunkamp, Schoenaich, DE;
Krishnan Sugavanam, Elmsford, NY (US);
Bryan J. Weatherford, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for improving the yield rate of a multiprocessor semiconductor chip that includes primary processor cores and one or more redundant processor cores. A first tester conducts a first test on one or more processor cores, and encodes results of the first test in an on-chip non-volatile memory. A second tester conducts a second test on the processor cores, and encodes results of the second test in an external non-volatile storage device. An override bit of a multiplexer is set if a processor core fails the second test. In response to the override bit, the multiplexer selects a physical-to-logical mapping of processor IDs according to one of: the encoded results in the memory device or the encoded results in the external storage device. On-chip logic configures the processor cores according to the selected physical-to-logical mapping.