The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2014
Filed:
Aug. 22, 2011
Karl Engl, Pentling, DE;
Markus Maute, Alteglofshiem, DE;
Andreas Weimar, Regensburg, DE;
Lutz Hoeppel, Alteglofsheim, DE;
Patrick Rode, Regensburg, DE;
Juergen Moosburger, Regensburg, DE;
Norwin Von Malm, Nittendorf, DE;
Karl Engl, Pentling, DE;
Markus Maute, Alteglofshiem, DE;
Andreas Weimar, Regensburg, DE;
Lutz Hoeppel, Alteglofsheim, DE;
Patrick Rode, Regensburg, DE;
Juergen Moosburger, Regensburg, DE;
Norwin von Malm, Nittendorf, DE;
OSRAM Opto Semiconductors GmbH, Regensburg, DE;
Abstract
An optoelectronic semiconductor chip includes a semiconductor layer sequence and a carrier substrate. A first and a second electrical contact layer are arranged at least in regions between the carrier substrate and the semiconductor layer sequence and are electrically insulated from one another by an electrically insulating layer. A mirror layer is arranged between the semiconductor layer sequence and the carrier substrate. The mirror layer adjoins partial regions of the first electrical contact layer and partial regions of the electrically insulating layer. The partial regions of the electrically insulating layer which adjoin the mirror layer are covered by the second electrical contact layer in such a way that at no point do they adjoin a surrounding medium of the optoelectronic semiconductor chip.