The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2014

Filed:

Feb. 03, 2012
Applicants:

Jin-won Lee, Cheonan-si, KR;

Woo Geun Lee, Yongin-si, KR;

Kap Soo Yoon, Seoul, KR;

Ki-won Kim, Suwon-si, KR;

Hyun-jung Lee, Dongducheon-si, KR;

Hee-jun Byeon, Suwon-si, KR;

Ji-soo OH, Uiwang-si, KR;

Inventors:

Jin-Won Lee, Cheonan-si, KR;

Woo Geun Lee, Yongin-si, KR;

Kap Soo Yoon, Seoul, KR;

Ki-Won Kim, Suwon-si, KR;

Hyun-Jung Lee, Dongducheon-si, KR;

Hee-Jun Byeon, Suwon-si, KR;

Ji-Soo Oh, Uiwang-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/12 (2006.01); H01L 27/12 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1225 (2013.01); H01L 29/41733 (2013.01);
Abstract

A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.


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