The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Oct. 25, 2005
Applicants:

Catherine A. Yadlon, Townsend, MA (US);

Neil T. Hentschel, North Andover, MA (US);

Brittain S. Mckinley, Groton, MA (US);

Inventors:

Catherine A. Yadlon, Townsend, MA (US);

Neil T. Hentschel, North Andover, MA (US);

Brittain S. McKinley, Groton, MA (US);

Assignee:

Broadbus Technologies, Inc., Boxborough, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/16 (2006.01); G06F 15/173 (2006.01); G06F 13/28 (2006.01); H04L 29/08 (2006.01); H04L 12/861 (2013.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
H04L 67/06 (2013.01); H04L 49/90 (2013.01); H04L 67/1097 (2013.01); G06F 9/4843 (2013.01);
Abstract

Via use of a shared data bus, a processor system offloads processing tasks. For example, a processor system communicates over a respective data bus with a data communication controller. After notifying the data communication controller of a particular block of data to retrieve, the processor system relinquishes control of the respective data bus so that the data communication controller can control the data bus and store a block of data in a specified memory location using direct memory access techniques. Upon receiving a notification of completion of storing the data block by the data communication controller, the processor system regains control of the respective data bus and notifies a data forwarding circuit to: i) partition the block of data into data packets, ii) apply respective headers to the data packets based on the header information received from the processor system, and iii) forward the data packets to the respective destination.


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