The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2014
Filed:
Jul. 28, 2010
Applicant:
Takeshi Fujino, Kusatsu, JP;
Inventor:
Takeshi Fujino, Kusatsu, JP;
Assignee:
The Ritsumeikan Trust, Kyoto, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/06 (2006.01); G11C 7/12 (2006.01); H04L 9/28 (2006.01); H04L 9/00 (2006.01); G11C 7/24 (2006.01); G11C 8/08 (2006.01); G06F 7/58 (2006.01);
U.S. Cl.
CPC ...
G11C 8/08 (2013.01); G11C 7/12 (2013.01); H04L 9/0618 (2013.01); H04L 9/28 (2013.01); H04L 9/003 (2013.01); G11C 7/24 (2013.01); H04L 2209/127 (2013.01); G06F 7/584 (2013.01);
Abstract
An integrated memory circuit applies to an S-box of a cryptographic circuit. The integrated memory circuit includes a row decoder, a column decoder, and a sense amplifier composed of a domino-RSL circuit, wherein data reading and data writing from/to memory cells of a memory cell array are performed via two complementary bit lines, and the transition probability of a signal line is equalized by input of random-number data supplied from a random-number generating circuit using an arbiter circuit.