The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2014
Filed:
Dec. 12, 2012
Amna Shawwa, Sugar land, TX (US);
Phat Truong, Houston, TX (US);
Amna Shawwa, Sugar land, TX (US);
Phat Truong, Houston, TX (US);
Nanya Technology Corporation, Taoyuan, TW;
Abstract
The invention provides a memory apparatus and a signal delay circuit thereof. The signal delay circuit provided by present disclosure includes an input inverter, a first inverter, a capacitor, a first transistor, a second inverter and output inverter. The input inverter receives an input signal and output a signal to the first inverter. The capacitor coupled to an output terminal of the first inverter. The second terminal of the first transistor coupled to the output terminal of the first inverter and the first terminal of the first transistor coupled to an operating voltage. An input terminal of the second inverter is coupled to the output terminal of the first inverter and an output terminal of the second inverter is coupled to the control terminal of the first transistor. The output inverter is used to generate a delayed output signal.