The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2014
Filed:
Sep. 06, 2012
Brian Yung Fun Wong, San Jose, CA (US);
Shankar Sinha, San Jose, CA (US);
Shih-lin S. Lee, San Jose, CA (US);
Abhishek B. Sharma, San Jose, CA (US);
Brian Yung Fun Wong, San Jose, CA (US);
Shankar Sinha, San Jose, CA (US);
Shih-Lin S. Lee, San Jose, CA (US);
Abhishek B. Sharma, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Disclosed are apparatus and devices for programming and operating a programmable memory array portion coupled with a leakage reduction circuit. At the leakage reduction circuit, a frame bias signal that indicates a majority state of the memory array portion can be received. During idle states of the programmable memory array portion, at least one shared bit line of the memory array portion can be selectively biased based on the received frame bias signal. In one aspect, a first one of two bit lines is biased to a first state, while the second one of the two bits lines is biased to a second state that is opposite the first state. In a further aspect, the first state is a same state as the majority state of the memory array portion.