The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Jun. 20, 2011
Applicants:

Miho Nomoto, Tokyo, JP;

Yukitoshi Hirose, Tokyo, JP;

Inventors:

Miho Nomoto, Tokyo, JP;

Yukitoshi Hirose, Tokyo, JP;

Assignee:

PS4 Luxco S.a.r.l., Luxembourg, LU;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/00 (2006.01); G11C 5/04 (2006.01); G11C 5/06 (2006.01); H05K 1/14 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
G11C 5/063 (2013.01); G11C 5/04 (2013.01); H01L 2924/15192 (2013.01);
Abstract

A device includes: a wiring board having first and second surfaces opposing each other; and a plurality of memory packages on the first surface. The wiring board includes: a first set of terminals on the first surface; a plurality of second sets of terminals on the first surface; and a plurality of first signal lines. The terminals of the first set receive respective ones of a plurality of first signals supplied from a control device. Each of the second sets is provided for a corresponding one of the memory packages. The terminals of each of the second sets contact the corresponding one of the memory packages. The first signal lines extend from respective ones of the terminals of the first set while coupling respective ones of the terminals of each of the second sets. The first signal lines extend on the first surface without extending in the wiring board.


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