The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2014
Filed:
Apr. 09, 2010
Chang-yeop Kim, Yongin, KR;
Ki-myeong Eom, Yongin, KR;
Won-kyu Kwak, Yongin, KR;
Kwang-min Kim, Yongin, KR;
Chang-Yeop Kim, Yongin, KR;
Ki-Myeong Eom, Yongin, KR;
Won-Kyu Kwak, Yongin, KR;
Kwang-Min Kim, Yongin, KR;
Samsung Display Co., Ltd., Yongin-si, KR;
Abstract
A pixel including: an organic light emitting diode that is coupled between a first power supply and a second power supply; a first transistor that is coupled between the first power supply and the organic light emitting diode and whose gate is connected to a first node; a second transistor that is coupled between the first node and a data line and whose gate electrode is coupled to a scan line; and a storage capacitor whose first electrode is coupled to the first node and second electrode is coupled to the first power supply, wherein the storage capacitor includes: a semiconductor layer that is positioned on a different layer from that of the data line and that expands to a region where the semiconductor layer overlaps with the data line and constitutes the first electrode, a first dielectric layer that is formed on the semiconductor layer, a first conductive layer that is formed on the first dielectric layer and constitutes the second electrode, a second dielectric layer that is formed on the first conductive layer, and a second conductive layer that is formed on the second dielectric layer and constitutes the first electrode together with the semiconductor layer, the first conductive layer being positioned between the data line and the semiconductor layer in order to cover the upper part of the region where it overlaps with the data line of the semiconductor layer.