The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Jul. 31, 2012
Applicants:

Victor A. Chang, San Jose, CA (US);

Bozidar Krsnik, Simi Valley, CA (US);

Inventors:

Victor A. Chang, San Jose, CA (US);

Bozidar Krsnik, Simi Valley, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 23/20 (2006.01); H03D 3/24 (2006.01); G01M 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are systems, apparatus, and methods for a self-contained timing and jitter measurement. In various embodiments, a device may include a first clock signal generator operative to provide a first clock signal to a transmitter of a transceiver, where the first clock signal operates at a first frequency. The device may further include a second clock signal generator operative to provide a second clock signal to a receiver of the transceiver, where the second clock signal operates at a second frequency, and where the receiver samples an output of the transmitter at a sampling rate determined by the second frequency. In some embodiments, the device may further include a logic circuit operative to receive an output signal from the receiver and further operative to determine an indication of jitter based on the received output signal.


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