The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Jun. 24, 2011
Applicants:

Renrong Liang, Beijing, CN;

Ning Cui, Beijing, CN;

Jing Wang, Beijing, CN;

Jun Xu, Beijing, CN;

Inventors:

Renrong Liang, Beijing, CN;

Ning Cui, Beijing, CN;

Jing Wang, Beijing, CN;

Jun Xu, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/49 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7391 (2013.01); H01L 29/66356 (2013.01); H01L 29/4983 (2013.01); H01L 29/4908 (2013.01);
Abstract

The present disclosure provides a TFET, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; a gate stack formed on the channel region, wherein the gate stack comprises: a gate dielectric layer, and at least a first gate electrode and a second gate electrode distributed in a direction from the source region to the drain region and formed on the gate dielectric layer, and the first gate electrode and the second gate electrode have different work functions; and a first side wall and a second side wall formed on a side of the first gate electrode and on a side of the second gate electrode respectively.


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