The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Mar. 13, 2013
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventor:

Fabio Zara, Mascalucia, IT;

Assignee:

STMICROELECTRONICS S.r.l., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 21/28 (2006.01); H01L 29/40 (2006.01); H01L 29/45 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 29/456 (2013.01); H01L 29/4933 (2013.01); H01L 29/42368 (2013.01); H01L 29/42372 (2013.01); H01L 29/4236 (2013.01); H01L 29/7813 (2013.01); H01L 21/2815 (2013.01); H01L 29/4238 (2013.01); H01L 29/66734 (2013.01); H01L 29/42376 (2013.01); H01L 29/407 (2013.01);
Abstract

An embodiment of a power device comprising and formation of at least one gate region, of at least one buried source region, of at least one body region and of at least one source region; at least one body/source contact and at least one buried source contact; and formation of a source contact region and of a gate contact region through deposition. An embodiment of the method also comprises formation of the at least one gate region and of the at least one buried source region, electrically insulated, through a single deposition of a conductive filling material on an epitaxial layer, on vertical walls of the trench and within the empty region; and through etching of the conductive filling material forming a first spacer and a second spacer, suitable for serving as a gate electrode and forming a buried source electrode within the empty region.


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