The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2014

Filed:

Jul. 29, 2013
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventor:

Susumu Shuto, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
G11C 8/08 (2013.01);
Abstract

According to one embodiment, a memory cell, a word line, and a peripheral circuit are provided. In the memory cell, a ferroelectric film is provided for a gate insulating film. The word line is connected to a control gate electrode of the memory cell. In the peripheral circuit, ferroelectric films are provided for gate insulating films and the peripheral circuit is provided near the memory cell. Here, between the same conductive type transistors of the peripheral circuit, a channel impurity concentration of a transistor to which a driving voltage which drives the word line is applied is different from a channel impurity concentration of a transistor to which a voltage which is lower than the driving voltage is applied.


Find Patent Forward Citations

Shuto, Susumu. (2014). Semiconductor memory device (U.S. Patent No. 8854914). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8854914

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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