The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2014

Filed:

Nov. 24, 2010
Applicants:

Gary Keall, Long Clawson, GB;

Giles Edkins, Cambridge, GB;

Eben Upton, Cambridge, GB;

James Adams, Cambridge, GB;

Inventors:

Gary Keall, Long Clawson, GB;

Giles Edkins, Cambridge, GB;

Eben Upton, Cambridge, GB;

James Adams, Cambridge, GB;

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06T 1/00 (2006.01); G06F 9/38 (2006.01); G06T 11/40 (2006.01); G06F 15/78 (2006.01); G06F 9/52 (2006.01);
U.S. Cl.
CPC ...
G06F 15/7807 (2013.01); G06F 9/522 (2013.01); G06F 9/3857 (2013.01); G06T 11/40 (2013.01);
Abstract

In a graphics processing device, a plurality of processors write fragment shading results for order-dependent data to a buffer, according to the order in which the data is received. Fragment shading results for order-neutral data is written to the buffer one batch at a time. The order-dependent data comprises spatially overlapping data. Order-neutral data may not overlap. A scheduler controls the order of reception of one batch of data at a time by the processors. The order for receiving the order-dependent data may be determined. The plurality of processors may process the data in parallel. A writing order for writing results to a buffer from the processing in parallel, may be enforced. A portion of the processors may be instructed to wait before writing results to the buffer in a specified order. Processors signal when writing results to the buffer is complete.


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