The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2014

Filed:

Aug. 08, 2012
Applicants:

Barry A. Hoberman, Cupertino, CA (US);

Daniel L. Hillman, San Jose, CA (US);

William G. Walker, Saratoga, CA (US);

John M. Callahan, San Ramon, CA (US);

Michael A. Zampaglione, San Jose, CA (US);

Andrew Cole, Sunnyvale, CA (US);

Inventors:

Barry A. Hoberman, Cupertino, CA (US);

Daniel L. Hillman, San Jose, CA (US);

William G. Walker, Saratoga, CA (US);

John M. Callahan, San Ramon, CA (US);

Michael A. Zampaglione, San Jose, CA (US);

Andrew Cole, Sunnyvale, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/17 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.


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