The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8853551 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 07, 2014

Filed:

May. 12, 2011
Applicants:

Katsutoshi Kamei, Osaka, JP;

Yuu Sugimoto, Osaka, JP;

Kimihide Kitamura, Osaka, JP;

Inventors:

Katsutoshi Kamei, Osaka, JP;

Yuu Sugimoto, Osaka, JP;

Kimihide Kitamura, Osaka, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H05K 1/00 (2006.01); H05K 1/09 (2006.01); H05K 1/11 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
H05K 1/118 (2013.01); H05K 2201/0338 (2013.01); H05K 1/147 (2013.01);
Abstract

A wired circuit board includes an insulating layer, and a first conductive pattern and a second conductive pattern formed on the insulating layer. The first conductive pattern includes a first outer terminal on which a metal plating layer is provided, a first inner terminal to be solder connected, and a first wire which connects the first outer terminal and the first inner terminal. The second conductive pattern includes a second outer terminal to be solder connected, a second inner terminal to be solder connected, and a second wire which connects the second outer terminal and the second inner terminal. The first inner terminal and the second inner terminal are arranged in opposed relation with each other so as to be solder connected to the common electric component and preflux processing is performed thereon, and a metal plating layer is provided on the second wire.


Find Patent Forward Citations

Kamei, Katsutoshi. (2014). Wired circuit board and producing method thereof (U.S. Patent No. 8853551). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8853551

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