The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2014

Filed:

Mar. 30, 2011
Applicants:

Emmanuel P. Quevy, El Cerrito, CA (US);

Carrie W. Low, Union City, CA (US);

Jeremy Ryan Hui, Mountain View, CA (US);

Zhen Gu, Cupertino, CA (US);

Inventors:

Emmanuel P. Quevy, El Cerrito, CA (US);

Carrie W. Low, Union City, CA (US);

Jeremy Ryan Hui, Mountain View, CA (US);

Zhen Gu, Cupertino, CA (US);

Assignee:

Silicon Laboratories, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

In at least one embodiment of the invention, a method of manufacturing an integrated circuit including a microelectromechanical system (MEMS) device includes forming a first structural layer above at least one semiconductor device formed on a substrate. The method includes forming a second structural layer above the first structural layer. The second structural layer has a thickness substantially greater than a thickness of the first structural layer. The MEMS device comprises at least one portion of at least one of the first and second structural layers. In at least one embodiment of the invention, the method is carried out at one or more temperatures less than a tolerable threshold temperature for the at least one semiconductor device.


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