The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2014

Filed:

Sep. 14, 2012
Applicants:

Yan-bin Luo, Taipei, TW;

Chih-chien Hung, Hualien, TW;

Qui-ting Chen, Sanchong, TW;

Shang-ping Chen, Tai-Chung, TW;

Inventors:

Yan-Bin Luo, Taipei, TW;

Chih-Chien Hung, Hualien, TW;

Qui-Ting Chen, Sanchong, TW;

Shang-Ping Chen, Tai-Chung, TW;

Assignee:

Mediatek Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G06F 13/16 (2006.01); G11C 8/06 (2006.01);
U.S. Cl.
CPC ...
G06F 13/16 (2013.01); G11C 7/1051 (2013.01); G11C 8/06 (2013.01); G11C 7/1078 (2013.01);
Abstract

A memory controller is provided. The memory controller is powered by first and second power source and includes an input/output pin, a driver circuit, a terminal resistor, and an input buffer. The driver circuit is coupled to the input/output pin and capable of providing to a writing signal to the input/output pin. The terminal resistor is coupled between the input/output pin and the first power source. The input buffer is coupled to the input/output pin and capable of receiving a reading signal from the input/output pin. No terminal resistor is coupled between the input/output pin and the second power source.


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