The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2014
Filed:
Dec. 20, 2011
Applicant:
Masayuki Otsuka, Tokyo, JP;
Inventor:
Masayuki Otsuka, Tokyo, JP;
Assignee:
Lapis Semiconductor Co., Ltd., Yokohama, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01); H01L 27/11 (2006.01); G11C 29/00 (2006.01); G11C 17/14 (2006.01); H01L 27/02 (2006.01); G11C 5/14 (2006.01); H01L 27/118 (2006.01); H01L 27/108 (2006.01); H01L 23/525 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5256 (2013.01); H01L 27/1116 (2013.01); G11C 29/787 (2013.01); G11C 17/143 (2013.01); G11C 2229/766 (2013.01); H01L 27/0207 (2013.01); G11C 5/14 (2013.01); H01L 27/11803 (2013.01); H01L 27/10897 (2013.01);
Abstract
A semiconductor storage device has a great number of logic circuits and fuse blocks with its space-saving design. In the semiconductor storage device, a plurality of fuse blocks is arranged in a line or row in the vicinity of a gate array. Each fuse block includes a plurality of fuse pieces arranged in a juxtaposed manner and exposed to the exterior through a fuse window. A power-supply wire and a ground wire extend along the juxtaposed direction of the fuse pieces. Spacing in the vicinity of the gate array is used for arrangement of the fuse blocks.