The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2014
Filed:
Mar. 25, 2011
Ravi K. Ramaswami, Cupertino, CA (US);
Ravi K. Ramaswami, Cupertino, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
A built-in self-test (BIST) circuit for detecting power supply droops is disclosed. In one embodiment, the BIST circuit includes a transition circuit configured to launch logical signals into a delay line. The BIST circuit also includes a comparator configured to compare a logic signal based on that input into the delay line with one output from the delay line. A mismatch resulting from the comparison is indicative of a power supply droop. The BIST circuit may also include circuitry for calibrating the delay line. The calibration may be performed by enabling a feedback path between the output of the delay line and its input. Enabling the feedback path may form a ring oscillator utilizing the delay line. A counter may count the number of transitions caused by the ring oscillator in a predetermined time. The resulting count may be used to determine if the delay is in a desired range.