The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2014

Filed:

May. 17, 2011
Applicants:

Shinnosuke Maeda, Nagoya, JP;

Satoshi Hirano, Chita-gun, JP;

Inventors:

Shinnosuke Maeda, Nagoya, JP;

Satoshi Hirano, Chita-gun, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 3/46 (2006.01); H05K 3/34 (2006.01); H05K 3/24 (2006.01);
U.S. Cl.
CPC ...
H05K 1/113 (2013.01); H05K 3/3436 (2013.01); H05K 3/4682 (2013.01); H05K 2201/09472 (2013.01); H05K 3/244 (2013.01);
Abstract

To provide a multilayer wiring substrate which can prevent migration of copper between wiring traces to thereby realize a higher degree of integration, a solder resist layerhaving a plurality of openingsis disposed on a top surfaceside, and IC-chip connection terminalsand capacitor connection terminalsare buried in an outermost resin insulation layerin contact with the solder resist layer. Each of the IC-chip connection terminalsand the capacitor connection terminalsis composed of a copper layerand a plating layercovering the outer surface of the copper layer. A conductor layerpresent at the interface between the solder resist layerand the resin insulation layeris composed of a copper layerand a nickel plating layercovering the outer surface of the copper layer


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