The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2014

Filed:

Mar. 12, 2010
Applicant:

Andrew Stanford-jason, Salisbury, GB;

Inventor:

Andrew Stanford-Jason, Salisbury, GB;

Assignee:

XMOS Ltd., London, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01); G06F 11/36 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3604 (2013.01);
Abstract

A method and corresponding tool for estimating program execution time. A higher-level structure is received as an input, representing control flow through an executable program. The higher-level structure comprises one or more levels of parent nodes, each parent node representing internal structure comprising a group of one or more child nodes and one or more associated edges between nodes. The levels of the higher-level structure are probed to extract a substructure representing a route through the program from a start instruction to an end instruction, by selectively extracting nodes of different levels of parent to represent different regions along the route in dependence on a location of the start and end instructions relative to the levels of parent nodes. An execution time for the route through the program is estimated based on the extracted substructure, and a modification affecting the execution time is made in dependence on the estimation.


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