The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2014

Filed:

Jun. 27, 2011
Applicant:

Gordon I. Old, Balerno, GB;

Inventor:

Gordon I. Old, Balerno, GB;

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multiplier circuit and method multiply a signed value by a constant. The signed value received at an input port is separable into two or more splices. A first splice is a most significant one of the splices, and a second splice is another one of the splices. One or more memories provide respective partial products for the splices, and these memories include a shared memory. The shared memory provides the respective partial products for the first and second splices from storage locations in the shared memory. The storage locations that are readable to provide the respective partial product for the second splice are a subset of the storage locations that are readable to provide the respective partial product for the first splice. An addition circuit sums the respective partial products for the splices.


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