The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2014

Filed:

Aug. 25, 2011
Applicants:

Masaki Kamimura, Nagasaki-ken, JP;

Takashi Shimizu, Oita-ken, JP;

Kunihiro Miyazaki, Oita-ken, JP;

Inventors:

Masaki Kamimura, Nagasaki-ken, JP;

Takashi Shimizu, Oita-ken, JP;

Kunihiro Miyazaki, Oita-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 21/36 (2006.01); H01L 21/31 (2006.01); G05B 19/418 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 22/20 (2013.01); G05B 2219/32198 (2013.01); G05B 19/41875 (2013.01); G05B 2219/45031 (2013.01); G05B 2219/32194 (2013.01);
Abstract

A manufacturing method for a semiconductor device, comprising: performing first processing on a plurality of wafers in a first processing order in a first processing apparatus; obtaining a processed amount with respect to each of the plurality of wafers in the first processing; obtaining a processed amount with respect to each of the plurality of wafers by second processing in a second processing apparatus after the first processing; deciding a second processing order, which is different from the first processing order, from the processed amount with respect to each of the plurality of wafers by the first processing and the processed amount with respect to each of the plurality of wafers by the second processing; and performing the second processing on the plurality of wafers in the second processing order in the second processing apparatus.


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