The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2014
Filed:
Apr. 12, 2012
George M. Braceras, Essex Junction, VT (US);
Albert M. Chu, Essex, VT (US);
Kevin W. Gorman, Fairfax, VT (US);
Michael R. Ouellette, Westford, VT (US);
Ronald A. Piro, Essex Junction, VT (US);
Daryl M. Seitzer, Essex Junction, VT (US);
Rohit Shetty, Essex Junction, VT (US);
Thomas W. Wyckoff, Jeffersonville, VT (US);
George M. Braceras, Essex Junction, VT (US);
Albert M. Chu, Essex, VT (US);
Kevin W. Gorman, Fairfax, VT (US);
Michael R. Ouellette, Westford, VT (US);
Ronald A. Piro, Essex Junction, VT (US);
Daryl M. Seitzer, Essex Junction, VT (US);
Rohit Shetty, Essex Junction, VT (US);
Thomas W. Wyckoff, Jeffersonville, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A read only memory (ROM) with redundancy and methods of use are provided. The ROM with redundancy includes a programmable array coupled to a repair circuit having one or more redundant repairs. The one or more redundant repairs include a word address match logic block, a data I/O address, and a tri-state buffer. The word address match logic block is provided to the tri-state buffer as a control input and the data I/O address is provided to the tri-state buffer as an input. An output of the tri-state buffer of each redundant repair is provided as a first input to one or more logic devices. One or more data outputs of a ROM bit cell array is provided as a second input to a respective one of the one or more logic devices.