Method and apparatus for resilient clock transfer over multiple dsl lines

Abstract

A system and method for transmitting and recovering external clock signals over links of a DSL system in which the external clock signals are used to synchronize transmitted physical layer signals from a CO of a DSL system and said external clock signals are derived from the received physical layer signals at an RT/CPE location of a DSL system. A clock recovery subsystem located at both the CO and the RT/CPE comprises a clock monitor circuit in communication with a Phase Lock Loop circuit. The clock monitor circuit at the RT/CPE is able to derive clock signals from the received physical layer signals and select one of said derived clocks to which a local reference clock at the RT/CPE is synchronized. The synchronized local reference clock, which can exist even when there are no valid derived clocks, may be used to transmit pseudowire frames (e.g., TDM data over Ethernet).