The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2014
Filed:
Jun. 04, 2013
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Tae-Young Kim, Seoul, KR;
Youngho Lim, Yongin-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/06 (2006.01); G11C 11/406 (2006.01); G11C 16/10 (2006.01); H01L 27/115 (2006.01); G11C 16/04 (2006.01); G11C 16/16 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 11/406 (2013.01); G11C 16/10 (2013.01); H01L 27/11556 (2013.01); H01L 27/11573 (2013.01); G11C 16/0483 (2013.01); H01L 27/1157 (2013.01); H01L 27/11582 (2013.01); H01L 27/11529 (2013.01);
Abstract
A method of operating a non-volatile memory device includes storing one or more addresses of word lines (WLs), but not the entire addresses of the WLs, into a latch, the WLs disposed between a string selection line (SSL) and a ground selection line (GSL), selecting a first WL from the latch, performing an erasing operation on memory cells associated with the string selection line (SSL), the memory cells associated with the SSL constituting a memory block, and verifying the erasing operation on memory cells associated with the selected first WL.