The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2014

Filed:

Mar. 15, 2013
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Gerrit Willem den Besten, Eindhoven, NL;

Madan Vemula, Tempe, AZ (US);

Jingsong Zhou, Gilbert, AZ (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H03K 17/30 (2006.01);
U.S. Cl.
CPC ...
H03K 17/162 (2013.01);
Abstract

A data link circuit switches high-speed signals through FET-based circuitry between channels. A FET responds to control signals at the gate terminal to operate in either a signal-passing mode or another (blocking) mode. In the passing mode, an AC (high-speed) signal is passed between the S-D terminals by coupling a first signal portion (of the AC signal) and with another signal portion diverted by the inherent capacitances associated with the FET. For offsetting the loading caused by the inherent capacitances associated with the FET-based switch, a biasing circuit is configured and arranged to bias the back-gate terminal of the FET transistor with a follower signal.


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