The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2014

Filed:

Aug. 16, 2013
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Hyunho Kim, Paju-si, KR;

Seokwoo Lee, Bucheon-si, KR;

Heedong Choi, Seosan-si, KR;

Sangjin Lee, Goyang-si, KR;

Seongmoh Seo, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 51/52 (2006.01); H01L 51/56 (2006.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
H01L 51/52 (2013.01); H01L 2251/558 (2013.01); H01L 27/3265 (2013.01); H01L 2227/323 (2013.01); H01L 27/3258 (2013.01); H01L 51/56 (2013.01); H01L 27/3244 (2013.01);
Abstract

An organic light emitting diode (OLED) display and a method for manufacturing the same are provided. The OLED display includes a substrate, an active layer and a capacitor lower electrode positioned on the substrate, a gate insulating layer positioned on the active layer and the capacitor lower electrode, a gate electrode positioned on the gate insulating layer at a location corresponding to the active layer, a capacitor upper electrode positioned on the gate insulating layer at a location corresponding to the capacitor lower electrode, a first electrode positioned to be separated from the gate electrode and the capacitor upper electrode, an interlayer insulating layer positioned on the gate electrode, the capacitor upper electrode, and the first electrode, a source electrode and a drain electrode positioned on the interlayer insulating layer, and a bank layer positioned on the source and drain electrodes.


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