Method of verifying an identification circuit

Abstract

The invention relates to a method for verifying an identification circuit () integrated in a component to be identified, having the following steps: a) entering a primary key in the identification circuit (), b.) reading a secondary key output by the identification circuit () in reaction to the input of the primary key, c.) providing a control key associated with the primary key, d.) comparing the control key to the output secondary key, e.) providing a result of the comparison step, wherein in case of a match of the secondary key to the control key, the component having the identification circuit is identified as an original component, and in the opposite case, as a counterfeit component, and wherein the identification circuit () comprises non-conducting, semiconducting, and conducting materials disposed and connected to each other such that at least one electronic circuit configuration is formed, comprising at least one defined mathematical function and configured for determining the secondary key from the primary key inputted into the identification circuit (), and providing said secondary key for readout, at least using the at least one mathematical function.