The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

Mar. 11, 2011
Applicants:

Jonathan Ross, Woodinville, WA (US);

Jork Loeser, Woodinville, WA (US);

Inventors:

Jonathan Ross, Woodinville, WA (US);

Jork Loeser, Woodinville, WA (US);

Assignee:

Microsoft Corporation, Redmond, WA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0837 (2013.01); G06F 12/084 (2013.01);
Abstract

A technology can be provided for managing shared memory used by a plurality of compute nodes. An example system can include a shared globally addressable memory to enable access to shared data by the plurality of compute nodes. A memory interface can process memory requests sent to the shared globally addressable memory from the plurality of processors. A memory write module can be included for the memory interface to allocate memory locations in the shared globally addressable memory and write read-only data to the globally addressable memory from a writing compute node. In addition, a read module for the memory interface can map read-only data in the globally addressable shared memory as read-only for subsequent accesses by the plurality of compute nodes.


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