The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

Apr. 21, 2011
Applicants:

Isao Asako, Osaka, JP;

Yukinori Nakagawa, Osaka, JP;

Hiromi Nishino, Osaka, JP;

Shinji Shimada, Osaka, JP;

Inventors:

Isao Asako, Osaka, JP;

Yukinori Nakagawa, Osaka, JP;

Hiromi Nishino, Osaka, JP;

Shinji Shimada, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1339 (2006.01); G02F 1/1335 (2006.01); G02F 1/1334 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1339 (2013.01); G02F 1/133512 (2013.01); G02F 1/1334 (2013.01);
Abstract

Provided is a display panel using polymer network liquid crystal in which a monomer unreacted region is reduced and a thin-film transistor can be prevented from being irradiated with light energy. In the display panel, a black matrix () is provided as an element having a light-shielding property in a first substrate (), a pixel electrode () and a thin-film transistor () serving as a switching element for driving the pixel electrode () are provided in a second substrate (), polymer network liquid crystal () is filled between the first substrate () and the second substrate (), a cover portion () that is part of the black matrix () provided in the first substrate () faces the thin-film transistor () provided in the second substrate (), and the outer periphery of the cover portion () is located outside the outer periphery of a channel region by a specified dimension or more.


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