The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2014
Filed:
Mar. 23, 2010
Jonathan P. Doane, Cedar Rapids, IA (US);
Bryan S. Mccoy, Cedar Rapids, IA (US);
David W. Cripe, Mount Vernon, IA (US);
Jonathan P. Doane, Cedar Rapids, IA (US);
Bryan S. McCoy, Cedar Rapids, IA (US);
David W. Cripe, Mount Vernon, IA (US);
Rockwell Collins, Inc., Cedar Rapids, IA (US);
Abstract
The present invention is load circuit for a parasitic antenna element of a parasitic antenna array. The load circuit may include a DC bias current source, a resistor connected to the DC bias current source, one or more capacitors connected to the resistor, and multiple (ex. —two) diodes connected to the parasitic antenna element. The first diode may be configured for directly connecting the parasitic element to a ground plane of the parasitic antenna array. The second diode may be configured for connecting the parasitic element to the ground plane via the one or more capacitors. The load circuit may be configured for providing a variable (ex. —adjustable) impedance to the parasitic antenna array.