The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2014
Filed:
Jul. 31, 2013
Applicant:
Seiko Epson Corporation, Tokyo, JP;
Inventors:
Yoshinao Yanagisawa, Ueda, JP;
Takayuki Kikuchi, Okaya, JP;
Assignee:
Seiko Epson Corporation, , JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 3/08 (2006.01); H03F 1/26 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45179 (2013.01); H03F 3/08 (2013.01); H03F 2200/408 (2013.01); H03F 3/45475 (2013.01); H03F 2200/261 (2013.01); H03F 1/26 (2013.01); H03F 2200/411 (2013.01); H03F 2203/45594 (2013.01); H03F 2203/45528 (2013.01);
Abstract
A signal level conversion circuitincludes a first differential amplifier circuitand a second differential amplifier circuit. The first differential amplifier circuitmultiplies a potential difference between a first input signal and a second input signal by G1 thereby providing an output signal. The second differential amplifier circuitmultiplies a potential difference between the output signal of the first differential amplifier circuitand the second input signal by G2 thereby providing an output, where the two gains satisfy the relation of G1×G2<0 and 0<−(G1+1)×G2<2.