The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

May. 10, 2012
Applicants:

Munaf Rahimo, Uezwil, CH;

Arnost Kopta, Zürich, CH;

Jan Vobecky, Lenzburg, CH;

Wolfgang Janisch, Gränichen, CH;

Inventors:

Munaf Rahimo, Uezwil, CH;

Arnost Kopta, Zürich, CH;

Jan Vobecky, Lenzburg, CH;

Wolfgang Janisch, Gränichen, CH;

Assignee:

ABB Technology AG, Zürich, CH;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7395 (2013.01); H01L 29/0611 (2013.01); H01L 29/66333 (2013.01);
Abstract

A maximum-punch-through semiconductor device such as an insulated gate bipolar transistor (IGBT) or a diode, and a method for producing same are disclosed. The MPT semiconductor device can include at least a two-layer structure having an emitter metallization, a channel region, a base layer with a predetermined doping concentration N, a buffer layer and a collector metallization. A thickness W of the base layer can be determined by: wherein a punch-through voltage Vof the semiconductor device is between 70% and 99% of a break down voltage Vof the semiconductor device, and wherein the thickness W is a minimum thickness of the base layer between a junction to the channel region and the buffer layer.


Find Patent Forward Citations

Loading…