The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

May. 24, 2013
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventor:

Sajan Marokkey, Wappingers Falls, NY (US);

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H04R 31/00 (2006.01); G01N 21/956 (2006.01); H02N 99/00 (2006.01); H04R 7/10 (2006.01); H01J 37/26 (2006.01);
U.S. Cl.
CPC ...
H02N 99/00 (2013.01); H04R 31/003 (2013.01); G01N 21/956 (2013.01); H04R 7/10 (2013.01); H01J 37/26 (2013.01);
Abstract

Test structures and methods for semiconductor devices, lithography systems, and lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes using a lithography system to expose a layer of photosensitive material of a workpiece to energy through a lithography mask, the lithography mask including a plurality of first test patterns having a first phase shift and at least one plurality of second test patterns having at least one second phase shift. The layer of photosensitive material of the workpiece is developed, and features formed on the layer of photosensitive material from the plurality of first test patterns and the at least one plurality of second test patterns are measured to determine a optimal focus level or optimal dose of the lithography system for exposing the layer of photosensitive material of the workpiece.


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