The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

Oct. 26, 2011
Applicant:

Shinnosuke Maeda, Nagoya, JP;

Inventor:

Shinnosuke Maeda, Nagoya, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/20 (2006.01); H05K 3/36 (2006.01); H05K 1/00 (2006.01); H01L 21/48 (2006.01); H05K 3/46 (2006.01); H05K 3/00 (2006.01);
U.S. Cl.
CPC ...
H05K 3/4682 (2013.01); H05K 2201/0358 (2013.01); H05K 2203/0228 (2013.01); H01L 21/4857 (2013.01); H05K 3/0026 (2013.01);
Abstract

A method of manufacturing a multilayer wiring substrate is provided. A foil of a metal-foil-clad resin insulation material is brought into contact with a foil of a metal-foil-clad support substrate. A peripheral edge portion of the resin insulation material exposed as a result of removal of a peripheral edge portion of the foil is adhered to the foil of the support substrate. A plurality of conductor layers and a plurality of resin insulation layers are laminated so as to obtain a laminate structure having a wiring laminate portion, which is to become the multilayer wiring substrate. The laminate structure is cut along a boundary between the wiring laminate portion and a surrounding portion, and the surrounding portion is removed. The wiring laminate portion is separated from the support substrate along the boundary between the two foils.


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