The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2014

Filed:

May. 07, 2013
Applicant:

International Business Machines Coporation, Armonk, NY (US);

Inventors:

Elspeth Anne Huston, Fiskill, NY (US);

Johannes Koesters, Weil im Schoenbuch, DE;

Klaus-Dieter Schubert, Schoenaich, DE;

Marshall D. Tiner, Elgin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 17/50 (2006.01); G06F 11/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

An aspect includes a computer program product for implementing a model of an electrical circuit including a first region and a second region, the first region including simulated logic and a simulated latch circuit. The computer program product includes a tangible storage medium readable by a processing circuit for performing a method. The method includes receiving, as simulated logical inputs to the simulated logic a simulated power supply voltage state of the first region, a simulated data input signal and a simulated clock signal. The method also includes generating, based on determining that the simulated power supply voltage state of the first region corresponds to an inactive state of the first region, a pseudo-random number as an output of the simulated latch circuit, the pseudo-random number generated based on the simulated data input signal and the simulated data output signal from the simulated latch circuit.


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