The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2014

Filed:

Jan. 13, 2010
Applicant:

Joern Naujokat, Freising, DE;

Inventor:

Joern Naujokat, Freising, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/04 (2006.01); G11C 29/02 (2006.01); G11C 7/22 (2006.01); G11C 7/04 (2006.01);
U.S. Cl.
CPC ...
G11C 7/22 (2013.01); G11C 29/02 (2013.01); G11C 7/222 (2013.01); G11C 2207/2254 (2013.01); G11C 29/028 (2013.01); G11C 29/023 (2013.01); G11C 7/04 (2013.01);
Abstract

A apparatus is provided for buffering data between a memory controller and a DRAM. The apparatus includes a phase locked loop (PLL), a phase interpolator for aligning a phase of an output clock signal in response to a phase aligning control word, and a non-volatile storage location permanently storing the phase aligning control word. The phase aligning control word is determined through an initial training procedure of the device under predetermined training conditions of at least a supply voltage level and a temperature, and the predetermined training conditions are set so as to optimize the phase alignment of an edge of the output clock signal with respect to the buffered data signal.


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