The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2014
Filed:
Aug. 25, 2011
Young IL Kim, Suwon-si, KR;
IN Sang Song, Osan-si, KR;
Duck Hwan Kim, Goyang-si, KR;
Chul Soo Kim, Hwaseong-si, KR;
Yun Kwon Park, Dongducheon Si, KR;
Jea Shik Shin, Hwaseong-si, KR;
Hyung Rak Kim, Seoul, KR;
Jae Chun Lee, Seoul, KR;
Young Il Kim, Suwon-si, KR;
In Sang Song, Osan-si, KR;
Duck Hwan Kim, Goyang-si, KR;
Chul Soo Kim, Hwaseong-si, KR;
Yun Kwon Park, Dongducheon Si, KR;
Jea Shik Shin, Hwaseong-si, KR;
Hyung Rak Kim, Seoul, KR;
Jae Chun Lee, Seoul, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
Provided is a structure and disposing method of a radio frequency (RF) layered module using three dimensional (3D) vertical wiring. A first wafer in the RF layered module having the 3D vertical wiring may include a first RF device and at least one first via-hole. A second wafer may include a second RF device and at least one second via-hole disposed at a location corresponding to the at least one first via-hole. A vertical wiring may connect the at least one first via-hole and the at least one second via-hole. The vertical wiring may be configured to be connected to an external device through a bottom surface of the at least one first via-hole or a top surface of the at least one second via-hole.