The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2014

Filed:

Dec. 30, 2010
Applicants:

Jeff Rysinski, Pasedena, CA (US);

Yibing Michelle Wang, Temple City, CA (US);

Sang-soo Lee, Cupertino, CA (US);

Inventors:

Jeff Rysinski, Pasedena, CA (US);

Yibing Michelle Wang, Temple City, CA (US);

Sang-Soo Lee, Cupertino, CA (US);

Assignee:

Hynix Semiconductor Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/335 (2011.01); H03M 1/10 (2006.01); H04N 5/228 (2006.01); H04N 17/00 (2006.01); H04N 5/378 (2011.01); H04N 5/374 (2011.01); H03M 1/56 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H04N 5/374 (2013.01); H04N 17/002 (2013.01); H04N 5/378 (2013.01); H03M 1/1033 (2013.01); H03M 1/56 (2013.01); H03M 1/123 (2013.01);
Abstract

An image processing system includes a pixel array including a plurality of regular pixel columns and at least one test pixel column, a plurality of column analog-to-digital converters (ADCs) configured to correspond to the regular pixel columns and convert analog input signals into digital signals, and a switching block configured to provide output signals of the regular pixel columns to input ends of the corresponding column ADCs in a normal mode, and provide in common an output signal of the test pixel column to the input ends of the column ADCs in a test mode, wherein the test pixel column generates signals having a minute voltage different from one row to another row.


Find Patent Forward Citations

Rysinski, Jeff. (2014). Image processing system with on-chip test mode for column adcs (U.S. Patent No. 8823850). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8823850

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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