The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2014
Filed:
Aug. 10, 2012
Sidharth Dalmia, Fair Oaks, CA (US);
Mark Patrick Mcgrath, West Sacramento, CA (US);
Sun Zhuowen, Sacramento, CA (US);
Sidharth Dalmia, Fair Oaks, CA (US);
Mark Patrick McGrath, West Sacramento, CA (US);
Sun Zhuowen, Sacramento, CA (US);
Tyco Electronics Corporation, Berwyn, PA (US);
Abstract
A planar electronic device includes a planar substrate having a cavity configured to receive a ferrite material body therein. The planar substrate has an upper side and a lower side and conductive vias extending through the substrate. Top conductors are provided on the upper side of the planar substrate and are electrically connected to corresponding conductive vias. Bottom conductors are provided on the lower side of the planar substrate and are electrically connected to corresponding conductive vias. The bottom conductors, top conductors and conductive vias define a primary conductive loop and a secondary conductive loop. An upper cover layer covers the upper side and has a high permittivity. The upper cover layer is positioned relative to the top conductors to increase capacitance between the primary and secondary loops.