The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2014

Filed:

Jan. 07, 2013
Applicant:

Huawei Technologies Co., Ltd., Guangdong, CN;

Inventors:

Xinyu Shen, Shenzhen, CN;

Jianmei Zhang, Shenzhen, CN;

Congqi Li, Plano, TX (US);

Tianhai Chang, Shenzhen, CN;

Hao Liu, Shenzhen, CN;

Zhiguo Liu, Shenzhen, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); H04J 14/02 (2006.01);
U.S. Cl.
CPC ...
H04J 3/0602 (2013.01); H04J 14/0201 (2013.01); H04J 3/0667 (2013.01);
Abstract

A method and a device for time synchronization are disclosed according to the embodiments of the present invention. The method includes: selecting, by a slave device, a port of a single-fiber bi-directional line as a synchronization port of a 1588 clock protocol; specifying a work mode of the synchronization port; exchanging a 1588 clock synchronization packet with a master device through the synchronization port according to the work mode; acquiring transmission time information and restore a system clock according to the 1588 clock synchronization packet; and adjusting the system clock according to the work mode and the transmission time information. The device includes: a line processing module, a clock recovery module and a clock adjustment module. Through the method and the device, zero-error time synchronization is implemented; and in the case of unfixed path delay, the time synchronization can also be implemented.


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