The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2014

Filed:

Apr. 26, 2013
Applicant:

Symetrix Corporation, Colorado Springs, CO (US);

Inventors:

Christopher Randolph McWilliams, Colorado Springs, CO (US);

Carlos A. Paz de Araujo, Colorado Springs, CO (US);

Jolanta Celinska, Colorado Springs, CO (US);

Assignee:

Symetrix Corporation, Colorado Springs, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H01L 25/00 (2006.01); G11C 17/18 (2006.01); H01L 45/00 (2006.01); H03K 19/173 (2006.01); G11C 17/16 (2006.01);
U.S. Cl.
CPC ...
H03K 19/173 (2013.01); G11C 17/18 (2013.01); H03K 19/1778 (2013.01); H01L 45/146 (2013.01); G11C 17/16 (2013.01);
Abstract

A re-programmable antifuse field programmable gate array (FPGA) integrated circuit, the FPGA comprising: a plurality of CeRAM resistive switching elements forming a connection block, the switching elements capable of being switched from a conductive (ON) state to a non-conductive (OFF) state and back to a conductive (ON) state; a plurality of logic elements forming a logic block; and a programming circuit for turning the CeRAM switching elements OFF and ON to connect the logic elements to form the FPGA.


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