The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2014

Filed:

Nov. 16, 2012
Applicant:

Samsung Electronics Co., Ltd., Suwon-Si, KR;

Inventors:

Yongsik Jeong, Suwon-si, KR;

Jeonguk Han, Suwon-si, KR;

Weonho Park, Hwaseong-si, KR;

Byungsup Shim, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 27/105 (2006.01); H01L 27/115 (2006.01); H01L 29/792 (2006.01); H01L 21/8239 (2006.01);
U.S. Cl.
CPC ...
H01L 21/8239 (2013.01); H01L 29/66833 (2013.01); H01L 27/1052 (2013.01); H01L 27/11568 (2013.01); H01L 29/792 (2013.01); H01L 27/11565 (2013.01);
Abstract

Nonvolatile memory devices and methods of forming the same are provided, the nonvolatile memory devices may include first regions and second regions which extend in a first direction and are alternately disposed in a semiconductor substrate along a second direction crossing the first direction. Buried doped lines are formed at the first regions respectively and extend in the first direction. The buried doped lines may be doped with a dopant of a first conductivity type. Bulk regions doped with a dopant of a second conductivity type and device isolation patterns are disposed along the second direction. The bulk regions and the device isolation patterns may be formed in the second regions. Word lines crossing the buried doped lines and the bulk regions are formed parallel to one another. Contact structures are connected to the buried doped lines and disposed between the device isolation patterns.


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