The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2014
Filed:
May. 30, 2008
Applicants:
Fumihiko Inoue, Aizuwakamatsu, JP;
Kentaro Sera, Aizumisato-machi, JP;
Inventors:
Fumihiko Inoue, Aizuwakamatsu, JP;
Kentaro Sera, Aizumisato-machi, JP;
Assignee:
Spansion LLC, Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/82 (2006.01); H01L 27/112 (2006.01); G11C 17/10 (2006.01);
U.S. Cl.
CPC ...
G11C 17/10 (2013.01); H01L 27/112 (2013.01); H01L 27/11226 (2013.01);
Abstract
The present invention is a manufacturing method for a semiconductor device having steps of; aligning a program headhaving a program dot array corresponding to each OTP-ROM cell arrayprovided in areasto be a plurality of semiconductor chips arranged in a semiconductor wafer to the OTP-ROM cell arrayin one of the areas to be the plurality of semiconductor chips; and programming the OTP-ROM cell arraywith a different pattern for each of the areas to be the plurality of semiconductor chipsby using the program head