The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2014

Filed:

Jun. 19, 2012
Applicants:

Christopher F. Graf, Liberty Hill, TX (US);

Ryan H. Brown, Austin, TX (US);

Daniel J. Baker, West Lafayette, IN (US);

Matthew J. Devoe, Austin, TX (US);

Sarvesh V. Nagarajan, Austin, TX (US);

Inventors:

Christopher F. Graf, Liberty Hill, TX (US);

Ryan H. Brown, Austin, TX (US);

Daniel J. Baker, West Lafayette, IN (US);

Matthew J. DeVoe, Austin, TX (US);

Sarvesh V. Nagarajan, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.


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